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The SRS CG635 generates extremely stable square wave clocks between 1 µHz and 2.05 GHz. The instrument's high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network. Clean clocks are critical in systems that use high-speed ADCs or DACs. Spurious clock modulation and jitter create artifacts and noise in acquired signals and in reconstructed waveforms. Clean clocks are also important in communications systems and networks. Jitter, wander, or frequency offsets can lead to high bit error rates, or to a total loss of synchronization. The SRS CG635 can provide the clean, stable clocks required for the most critical applications. The SRS CG635 has several clock outputs. The front-panel Q and -Q outputs provide complementary square waves at standard logic levels (ECL, PECL, LVDS or +7 dBm). The square wave amplitude may also be set from 0.2 V to 1.0 V, with an offset between -2 V and +5 V. These outputs operate from DC to 2.05 GHz, have transition times of 80 ps, a source impedance of 50 ohm, and are intended to drive 50 ohm loads. Output levels double when these outputs are unterminated. Specifications. Frequency Range: DC, 1 µHz to 2.05 GHz. Frequency Resolution: 16 digits (f >= 10 kHz), 1 pHz (f < 10 kHz). Timebase (20 °C to 30 °C ambient) Stability: <5 ppm (std. timebase). Phase Noise (at 622.08 MHz) 100 Hz offset: < -90 dBc/Hz. Jitter (rms): <1 ps (1 kHz to 5 MHz bandwidth. Phase setting Range: ±720° (max. step size ±360°). Option 01, PRBS.
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