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The Anritsu MP1763C 0.05 to 12.5 GHz Pulse Pattern Generator is used in combination with the MP1764C/1764D Error Detector. The MP1763C Pulse Pattern Generator combined with the MP1764C/1764D Error Detector are a BERTS (Bit Error Rate Test Set) supporting evaluation and testing of transmission equipment, high-speed devices, optical modules, etc., at every stage from R&D through to manufacturing and production at speeds from 50 Mbit/s to 12.5 Gbit/s.
Specifications.
Operation frequency: 0.05 to 12.5 GHz.
Internal CLOCK (Option 01) Frequency range: 0.05 to 12.5 GHz,
Internal CLOCK (Option 01) SSB phase noise: ≤-85 dBc/Hz (0.05 to 4 GHz), ≤-80 dBc/Hz (4 to 8 GHz), ≤-75 dBc/Hz (8 to 10 GHz), ≤-70 dBc/Hz (10 to 12.5 GHz) *At 10 kHz offset, 1 Hz bandwidth
External CLOCK input level: 0.4 to 2.5 Vp-p.
Pattern
Pseudorandom binary sequence pattern (PRBS)
Pattern: 2n - 1 (n: 7, 9, 11, 15, 20, 23, 31)
Mark ratio: 1/2, 1/4, 1/8, 0/8 (1/2, 3/4, 7/8, 8/8 are possible with logic inversion)
Bit shifts number for mark ratio varied: 1, 3 bits selectable
DATA pattern
DATA length: 2 to 8388608 bits
Alternate pattern
A/B pattern DATA length: 128 to 4194304 bits (128 bit steps); Loop time: A, B pattern (1 to 127, 1 steps)
Zero substitution pattern
Zero bit length: 1 to (pattern length - 1) bits; Pattern: 2n (n: 7, 9, 11, 15)
Error addition
Error rate: 10-n Error addition (n: 4, 5, 6, 7, 8, 9), and single error
External error injection: Provided
DATA output
Number of outputs: 2 (DATA/DATA independently)
Amplitude: 0.25 to 2 Vp-p, 2 mV steps
Offset voltage
VOH: -2 to +2 V, 1 mV steps
Display: VOH, VTH or VOL selectable
Rise/fall time: Typical 30 ps (10% to 90% of amplitude)
Pattern jitter: ≤20 psp-p, typical 10 psp-p
Waveform distortion: (0-peak) ≤15% or ≤150 mV whichever is greater
Gating input: Provided
Load impedance: 50 Ω (with back termination)
Connector: APC-3.5
CLOCK output
Number of outputs: 3 (CLOCK 1/CLOCK 1, CLOCK 2)
Amplitude
CLOCK 1/CLOCK 1: 0.25 to 2 Vp-p (2 mV steps)
CLOCK 2: 1 Vp-p
Offset voltage
CLOCK 1/CLOCK 1: VOH -2 to +2 V (1 mV steps)
CLOCK 2: VOH 0 V fixed
Rise/fall time: Typical 30 ps (10% to 90% of amplitude)
Load impedance: 50 Ω (CLOCK 1/CLOCK 1: with back termination)
Connector: CLOCK 1/CLOCK 1: APC-3.5, CLOCK 2: SMA
Delay: ±500 ps (1 ps steps)
Options
MP1763C-01: 12.5 GHz Synthesizer (50 MHz to 12.5 GHz)
MP1763C-03 1/4 speed output
MP1763C-08 1/4 Differential Data Output Function (100 Mbit/s to 3.125 Gbit/s)
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