601 |
Front panel not responding The main CPU A1U205 attempts to establish serial communications with the front panel processor A2U1. During this test, A2U1 turns on all display segments. Communication must function in both directions for this test to pass. If this error is detected during power-up self-test, the instrument will beep. This error is only readable from the remote interface.
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602 |
RAM read/write failed This test writes and reads a 55h and AAh checkerboard pattern to each address of RAM. Any incorrect readback will cause a test failure. This error is only readable from the remote interface.
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603 |
A / D sync stuck The main CPU issues an A/ D sync pulse to A1U209 and A1U205 to latch the value in the ADC slope counters. A failure is detected when a sync interrupt is not recognized and a subsequent time-out occurs.
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604 |
A / D slope convergence failed The input amplifier is configured to the measure zero (MZ) state in the 10 V range. This test checks whether the ADC integrator produces nominally the same number of positive and negative slope decisions (± 10%) during a 20 ms interval.
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605 |
Cannot calibrate rundown gain This test checks the nominal gain between the integrating ADC and the A1U205 on-chip ADC. This error is reported if the procedure can not run to completion due to a hardware failure.
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606 |
Rundown gain out of range This test checks the nominal gain between the integrating ADC and the A1U205 on-chip ADC. The nominal gain is check to ± 10% tolerance.
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607 |
Rundown too noisy This test checks the gain repeatability between the integrating ADC and the A1U205 on-chip ADC. The gain test (606) is performed eight times. Gain noise must be less than ± 64 LSB’s of the A1U205 on-chip ADC.
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608 |
Serial configuration readback failed This test re-sends the last 9 byte serial configuration data to all the serial path. The data is then clocked back into A1U209 and compared against the original 9 bytes sent. A failure occurs if the data do not match.
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609 |
DC gain x1 failed This test configures for the 10 V range. The dc amplifier gain is set to X1. The measure customer (MC) input is connected to the internal TSENSE source which produces 0.6 volts. A 20 ms ADC measurement is performed and checked against a limit of 0.6 V ± 0.3 V.
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610 |
DC gain x10 failed This test configures for the 1 V range. The dc amplifier gain is set to X10. The measure customer (MC) input is connected to the internal TSENSE source which produces 0.6 volts. A 20 ms ADC measurement is performed and checked against a limit of 0.6 V ± 0.3 V.
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611 |
DC gain x100 failed This test configures for the 100 mV range. The dc amplifier gain is set to X100. The measure customer (MC) input is connected to the internal TSENSE source which produces 0.6 volts. A 20 ms ADC measurement is performed and checked for a + overload response.
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612 |
Ohms 500 nA source failed This test configures to the 10 V dc range with the internal 10 M 100:1 divider A4U102 connected across the input. the 500 nA Ohms current source is connected to produce a nominal 5 V signal. A 20 ms ADC measurement is performed and the result is checked against a limit of 5 V ± 1 V.
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613 |
Ohms 5 μA source failed This test configures the 10 V range with the internal 10 M 100:1 divider A4U102 connected across the input. The 5 μA current source is connected. The compliance limit of the current source is measured. A 20 ms ADC measurement is performed and the result is checked against a limit of 7.5 V ± 3 V.
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614 |
DC 300V zero failed This test configures the 300 V dc range with no input applied. A 20 ms ADC measurement is performed and the result is checked against a limit of 0V ± 5 mV.
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615 |
Ohms 10 μA source failed This test configures the 10 V range with the internal internal 10 M 100:1 divider A4U102 connected across the input. The 10 μA current source is connected. A 20 ms ADC measurement is performed and the result is checked against a limit of 7.5 V ± 3 V.
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616 |
DC current sense failed This test configures the 1 A dc rage and function. A 20 ms ADC measurement is performed and the result is checked against a limit of 0 A ± 5 A. This test confirms that the dc current sense path is functional.
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617 |
Ohms 100 μA source failed This test configures the 10 V range with the internal 10 M 100:1 divider A4U102 connected across the input. The 100 μA current source is connected. The compliance limit of the current source is measured. A 20 ms ADC measurement is performed and the result is checked against a limit of 5 V ± 1 V.
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618 |
DC high voltage attenuator This test configures to the 300 Vdc range. the 500 nA ohms current source is connected to produce a nominal 5 V signal. A 20 ms ADC measurement is performed and the result is checked against a limit of –10 mV to 70 mV at the output of the rms-to-dc converter.
|
619 |
Ohms 1 mA source failed This test configures the 10 V range with the internal 1 0 M 100:1 divider A4U102 connected across the input. The 1 mA current source is connected. A 20 ms ADC measurement is performed and the result is checked against a limit of 7 V ± 3.5 V.
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620 |
AC rms zero failed This test configures to the 100 mV ac range with the ac input grounded through A4K103. The internal residual noise of the ac section is measured and checked against a limit of –10 mV to 70 mV at the output of the rms-to-dc converter.
|
621 |
AC rms full scale failed This test configures for the 100 mV ac range. The 1 mA ohms current source is switched on the charge the ac input capacitor A4C301. This produces a pulse on the output of the rms-to-dc converter which is sampled 100 ms after the current is applied. A 20 ms A/D measurement is performed and checked against a limit of 10 V ± 8.5 V into the ADC.
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622 |
Frequency counter failed This test configures for the 100 mV ac range. This test immediately follows test 621. With A4C301 holding charge from test 621 the ac input is now switched to ground through A4K103. This produces a positive pulse on the input to the frequency comparator A4U310. While C301 discharges, the ENAB FREQ bit is toggled four times to produce a frequency input to the counter logic in A1U205. A failure occurs if the counter can not measure the frequency input.
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623 |
Cannot calibrate precharge This test configures to the 100 V dc range with no input. The ADC is configured for 200 ms measurements. The A1U205 pulse width modulated (PWM) DAC output (C224) is set to about 4 volts. A reading is taken in with A4U101 in the MC state. A second reading is taken in the PRE state. The precharge amplifier voltage offset is calculated. The A1U205 DAC output is set to about 1.5 volts and the precharge offset is measured again. The gain of the offset adjustment is calculated. This test assures a precharge amplifier offset is achievable.
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624 |
Unable to sense line frequency This test checks that the LSENSE logic input to A1U205 is toggling. If no logic input is detected, the meter will assume a 50 Hz line operation for all future measurements.
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625 |
I/O processor did not respond This test checks that communications can be established between A1U205 and A1U305 through the optically isolated (A1U213 and A1U214) serial data link. Failure to establish communication in either direction will generate an error. If this condition is detected at power-on self-test, the instrument will beep and the error annunciator will be on.
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626 |
I/O processor failed self-test A failure occurred when the earth referenced processor, AU305, executed an internal RAM test.
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