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The HP 3764A Digital Transmission Analyzer is a portable BER and jitter test set covering the European CEPT rates from 704 kbit/s to 139 Mbit/s. Built-in printer for permanent results logging. A real-time clock timestamps the printout to help trap intermittent faults. External events can be logged via special analog and digital inputs to help correlate their occurrence with system error performance. Results can also be passed to an external printer via the HP-IB port. For multi-rate error analysis a choice is available. Option 001 can measure on CEPT interfaces at 2, 8, 34 and 139 Mbit/s. This capability may be enhanced with option 005 which adds fixed-frequency offsets to check frequency tolerance limits of equipment. Alternatively, synthesizer-based option 006 offers error performance analysis at CEPT interface rates from 704 kbit/ s to 139 Mbit/s plus fixed and variable clock offsets. Binary measurements can be made at any rate between 1 kbit/s and 170 Mbit/s in general-purpose and telecom applications. Combined error and jitter capability is useful in development and manufacturing applications and this is provided at 139 Mbit/s by options 002 or 007. The synthesizer-based option 007 additionally offers " through-data" jitter modulation for adding jitter to any 139 Mbit/ s signal passed through the instrument. Error analysis: Error count, error ratio, error seconds, error-free seconds, %unavailability, %errored seconds, %severely-errored seconds, %degraded minutes. All measurements are made simultaneously and in accordance with CCITT Recommendation G.821. Jitter analysis: Peak-to-peak amplitude, jitter hit count, jitter hit seconds, jitter hit-free seconds. Internal filters to CCITT Recommendation 0.171 are available for performing selective jitter measurements.
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