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The HP 3784A is a BER and jitter test set for manufacturing, commissioning, and maintaining network equipment operating at CEPT telecom interface rates of 704 kb/ s, 2, 8 and 34 Mb/s. It has a clock synthesizer and TTL/ ECL interfaces for general-purpose BER testing at any rate between 1 kb/ s and 50 Mb/ s and has optional jitter or 64 kb/s codirectional interfaces. The HP 3784A with option 002 can be paired with the HP 3764A digital transmission analyzer with option 002 or 007, to provide complete error and jitter test capability for manufacturing applications up to 139 Mb/ s. Error Analysis: Error count, error ratio, error and error-free intervals (seconds or deciseconds), % unavailability, % errored and % severely errored seconds, % degraded minutes, All measurements are made simultaneously. Jitter Analysis: Peak-to-peak amplitude, jitter hit count, jitter hit and hit-free seconds or deciseconds.
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